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AlphaCHIP Vacancies

At present AlphaCHIP has the following vacant positions:

Digital IC Design Department

Head of Digital IC Design Department

Requirements:

  • experience in the field of the system-on-chip design - no less than 7 years;
  • experience to manage the team of engineers - no less than 3 year;
  • system level functional verification experience - no less than 5 year;
  • knowledge of the modern design automation flow to design the system-on-chip with the use of Cadence tools;
  • deep Verilog knowledge and the knowledge of logic simulation and synthesis features are desirable;
  • fluent technical English is desirable.

Front-End Design Manager

Requirements:

  • the experience in the field of the system-on-chip design - no less than 5 years;
  • experience to manage the team of engineers - no less than 1 year;
  • knowledge of the modern design automation flow to design the system-on-chip with the use of Cadence tools;
  • deep Verilog knowledge and the knowledge of logic simulation and synthesis features;
  • fluent technical English is desirable;

Senior Staff Engineer, Front-End Design

  • the experience in the field of the system-on-chip design - no less than 3 years;
  • knowledge of the modern design automation flow to design the system-on-chip with the use of Cadence tools;
  • deep Verilog knowledge and the knowledge of logic simulation and synthesis features;
  • fluent technical English is desirable.

Back-End Design Manager

Requirements:

  • the experience in the field of the system-on-chip design - no less than 5 years;
  • experience to manage the team of engineers - no less than 1 year;
  • knowledge of the modern design automation flow to design the system-on-chip with the use of Cadence tools;
  • deep knowledge of physical synthesis level, static timing analysis (Cadence) and physical verification (Calibre);
  • fluent technical English is desirable.

Senior Staff Engineer, Back-End Design

  • the experience in the field of the system-on-chip design - no less than 3 years;
  • knowledge of the modern design automation flow to design the system-on-chip with the use of Cadence tools;
  • deep knowledge of physical synthesis level, static timing analysis (Cadence) and physical verification (Calibre);
  • fluent technical English is desirable.

Resumes of candidates can be sent to AlphaCHIP Director of Technology, Mr. Leonid Pereverzev (leonidp@alphachip.ru).

 
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