Process Design Kit
AlphaCHIP LLC is glad to render services on the Process Design Kits (PDK) development to our
current and new customers. PDK Team has all the necessary skills and long-term experience.
PDK development projects have been carried out for such customers like Motorola, Freescale Semiconductor and others.
We have PDK development experience for different processes (CMOS, SmartMOS, RF/IF, SOI, GaAs).
Library developments for Cadence dfII environment include both OpenAccess and CDBA versions.
Services to transfer PDKs from CDBA to OpenAccess can be also rendered.
Layout verification tool development
- Deck developments (writing scripts) for automatic control of layout design rules (DRC, MRC, ERC, DFM);
- Deck developments (writing scripts) for automatic control of correspondence of layout vs schematics (LVS);
- Experience to use Assura, Calibre, Hercules;
- LPE data generation for parasitic parameters extraction programs.
Parameterized Cell (Pcells) Development
- Primitive analog cell development (transistors, diodes, inductors, capacitors, guard rings);
- Logic PCell Development;
- Experience on development of cells are used with IPW process;
- Extended functionality Pcell support (stretchability, auto abutment/auto spacing, chopability).
Library Development Infrastructure
- Integration of simulator models into design environment (including back-annotation);
- Integration of layout verification tools into design environment;
- Development of specific software to support design automation processes.